1. Technical Field
The present invention relates to a laser pulse controlling circuit.
2. Description of the Related Art
Phase-change optical disks (CD-RW, DVD±RW, DVD-RAM, etc.) are prevailing as rewritable optical disks. In a phase-change optical disk, when a laser light beam having laser power at a predetermined level or higher is applied to a recording layer and, thereafter, the recording layer is rapidly cooled, the recording layer is in an amorphous state. When a laser light beam having laser power that is lower than the laser power with which the amorphous state is formed is applied to a recording layer and, thereafter, the recording layer is slowly cooled, the recording layer is in a crystal state.
In this manner, in a phase-change optical disk, information can be recorded on a recording face by suitably using either one of the two types of laser light beams. According to the standard for the phase-change optical disks, laser power at the level that forms the amorphous state is defined as laser power for recording of information into an optical disk (hereinafter, “writing power PW”) and laser power of the level that forms the crystal state is defined as laser power for erasing of information recorded in the optical disk (hereinafter, “erasing power PE”). Recording is usually executed using laser pulses having power levels respectively of three values including bias power PB that is lower than the erasing power PE.
An optical disk apparatus that executes recording and reproducing to/from a phase-change optical disk is configured by combining, for example, an optical pickup having a laser diode (hereinafter, “LD”), a front monitor diode (hereinafter, “FMD”), an LD driving circuit, etc.; an analog signal processing circuit that executes processing of an optical disk driving analog signal (such as amplification of an RF/HF signal, AGC (Automatic Gain Control), APC (Automatic Power Control), and production of a servo controlling signal); and a digital signal processing circuit that executes processing of an optical disk driving digital signal (such as encoding/decoding and digital servo).
The analog signal processing circuit has a writing power setting unit that especially produces a voltage controlling signal VWDC to set the writing power PW and supplies the signal VWDC to the LD driving circuit; an erasing power setting unit that produces a voltage controlling signal VEDC to set the erasing power PE and supplies the signal VEDC to the LD driving circuit; and a bias power setting unit that produces a voltage controlling signal VBDC to set the bias power PB and supplies the signal VBDC to the LD driving circuit. Therefore, the LD driving circuit drives the LD using laser pulses at power levels of three values respectively corresponding to the voltage controlling signals VWDC, VEDC, and VBDC. The digital signal processing circuit constitutes a laser pulse controlling circuit that targets especially the writing power setting unit and the erasing power setting unit to control.
Before actual recording is started, the laser pulse controlling circuit adjusts Epsilon that is the ratio of the erasing power PE to the writing power PW (PE/PW) through the control executed to the writing power setting unit and the erasing power setting unit. The purpose of the Epsilon adjustment is to set the writing power PW and the erasing power PE respectively to proper levels that match with the conditions specific to a medium such as the material and recording speed of the medium and the environmental conditions in question (such as temperature).
FIG. 10 is an explanatory flowchart of the Epsilon adjustment by a conventional laser pulse controlling circuit.
It is assumed that a proper light-receiving level at FMD (hereinafter, “FMD target value”) obtained when a predetermined Epsilon is set is statistically obtained using experimental data obtained from a plurality of experimental optical disk apparatuses. Before starting OPC (Optimum Power Control) that executes test writing to a PCA (Power Calibration Area) provided on a phase-change optical disk, the conventional laser pulse controlling circuit determines Epsilon (hereinafter, “Epsilon recommended value”) and the erasing power PE to be set for this recording. At this time, an FMD target value corresponding to the Epsilon recommended value is also determined together (S1000).
As the writing power PW is increased stepwise (S1001), when each increment is completed, the average value of the light-receiving level per predetermined time period observed by the FMD (hereinafter, “FMD observed value”) is obtained through an LPF (Low Pass Filter), etc. (S1002). At this time, when the FMD observed value does not exceed the FMD target value (S1003: NO), the next stepwise adjustment of the writing power PW is executed. When the FMD observed value exceeds the FMD target value for the first time (S1003: YES), the writing power PW at this time is the writing power PW corresponding to the Epsilon recommended value and the erasing power PE to be set this time (S1004).
Therefore, after applying multi-pulse modulation to the laser pulses by the erasing power PE and the writing power PW determined as above, an OPC process is executed (S1005) and recording with actual recording data is started (S1006).
As above, during the Epsilon adjustment, the conventional laser pulse controlling circuit executes repeatedly for many times the stepwise adjustment of the writing power using the FMD observed value as level adjustment of laser pulses disclosed in, for example, Patent Document 1 shown below.
Patent Document: Japanese Patent Application Laid-Open Publication No. 2001-34987
As shown in FIG. 10, the conventional laser pulse controlling circuit executes repeatedly for many times the acquisition of the FMD observed value and the stepwise adjustment of the writing power PW based on the FMD observed values until the setting of the power levels of the writing power PW and the erasing power PE corresponding to the Epsilon recommended values is completed.
Therefore, a problem has arisen that a long time period is needed before the OPC process is started, and that in turn the start of actual recording is delayed. By receiving for many times the influence of the precision of the FMD, the writing power PW is not set to an expected power level and the precision of the Epsilon adjustment may be degraded.